With the advancement of hardware security, combined attacks incorporating side-channel analysis (SCA) and fault analysis (FA) have driven the development of combined countermeasures. However, these countermeasures often incur significant overhead. In this paper, we propose a method to reduce the randomness requirement while maintaining security claims. We demonstrate the approach with Masks & Macs (M&M), a scheme that integrates Boolean masking and MAC tag redundancy to provide protection against SCA and differential fault analysis (DFA), addressing its substantial overhead, particularly the high randomness requirement. We introduce a novel multiplicative masking scheme to partially replace Boolean masked modules, achieving a reduction of over 50% in randomness requirement with a minor increase in FPGA resource overhead and latency. Through both theoretical and practical analyses, we prove that our approach maintains the same security claims against SCA, FA, and combined attacks as the original M&M-AES. Additionally, we discuss the feasibility of low-cost countermeasures against statistical ineffective fault attacks (SIFA). This work provides a new perspective on enhancing combined countermeasures by reducing system overhead.